The methods and systems described below relate to the field of hardware and software development.
The methods and systems described below provide for faster troubleshooting and debugging of hardware and software systems which are implemented with processors built with associated embedded trace macrocells. The embedded trace macrocell (ETM) is a relatively recent addition to processors, and its function is to provide information regarding the processor execution (for example, step-by-step functioning in the processor) to a separate device specifically designed to communicate with the embedded trace macrocell and collect the data. The collected data is transmitted from the ETM, through a trace port and trace port connector, to a trace port analyzer and then to a computer workstation so that a system developer can view an on-screen display or printout of the step-by-step operation of the processor. By viewing the report of the processor operation, the system developer can determine if the system is operating properly, and, if not, the system developer can determine exactly what steps of the processor operation are responsible for any improper operations. The system developer can view the trace information using software referred to as a software debugger, and can use the same software to configure the trace port and otherwise interact with the processor, ETM, and trace port. Analysis of the trace information can reveal problems with software executing on the processor which can be addressed by modifying the software.
Though the methods and systems may be used with any processor with an embedded trace macrocell, they were developed and are illustrated here in reference to the ARM7, ARM9 and ARM10 families of processors which include an embedded trace macrocell. The ARM embedded trace macrocells can collect and transmit trace data from their associated processors, as well as associated run control signals (the run control signals are provided through the test controller (JTAG) to set up, initiate, and control the operation of the processor). The ETM signals include pipeline status signals (PIPESTAT) which provide a cycle-by-cycle indication of what is happening in the execution stage of the processor, a trace sync signal (TRACESYNC) which indicates the start of a group of substantive signals, and trace packet signals (TRACEPKT) which are substantive signals which provide information regarding the state of the processor (such as identifying the instruction being performed by the processor). The trace packet signals carry trace packets, and may be 4 bits, 8 bits, or 16 bits in length, although the trace packets themselves are typically 8 bits in length. For every cycle of processor operation, a full ETM trace record or message is transmitted to the trace port, and this information is processed and transmitted by an external trace port analyzer which records the transmissions, and stores them for subsequent examination by the host-based debugger (the number of records stored is limited by the size of RAM in the trace port analyzer).
The amount of information that can be displayed to the operator depends on how much memory can be used to store the trace information. Random access memory in the trace port analyzer (we will refer to it as the trace port RAM, to distinguish it from the various other memories in the system) is used for storing trace information prior to communicating the information to the workstation. The trace port RAM is typically 500,000 storage locations to 2,000,000 storage locations. Typically, the trace port RAM is limited to storing one instruction (or a portion of an instruction) per RAM location. Thus, all the trace information in the trace port RAM represents just a split second of operation for a typical embedded processor. (In an ARM processor running at 100 MHZ, over one gigabit of trace information is generated every second.) If the trace port RAM overflows, the system must discard the oldest stored trace information (operating as FIFO memory), stop the processor (referred to as overflow stalling) or discontinue tracing until the trace port RAM is emptied. This occurs even if the branching is not fully reported and full address information is not transmitted where it is redundant. The disadvantage to this system is that only very short periods of time can be reflected in the trace listing eventually presented to the system developer, so that a particular software bug can be difficult to isolate.
The systems and methods described below provide for recording, storing, transferring and viewing trace data from a processor with an embedded trace macrocell. The system provides for compression of repetitive trace records using an algorithm which identifies compressible trace record streams, creates a highly compressed processed trace record stream and stores the processed trace record stream in trace RAM. Thereafter, the processed trace record stream may be transferred to a host computer, expanded and displayed or printed for analysis.
The trace data is obtained from an ETM in the form of a stream of trace records, which we refer to as the reported trace record stream. This reported trace record stream is then compressed, according to compression algorithms, and stored in trace RAM. We refer to the record stream generated by the algorithm as the processed record stream. This processed record stream is then transferred to a host computer, and the host computer, using decompression software implementing an algorithm which reverses the compression algorithm, substantially reconstructs the original reported trace record which was reported by the ETM. We refer to this record stream as a reconstructed record stream. Because the reported record stream is highly compressed before being stored in the trace RAM, system developers can capture a much larger stream, which makes isolation of software bugs much easier.
Compression is accomplished through a trace data processor, such as a CPLD designed to implement a compression algorithm. The compressed, processed record stream is decompressed using software on the host computer. The decompression software implements an algorithm which is a reverse of the compression algorithm. Two distinct compression algorithms exemplify the compression method. One compression method will result in high compression ratios when the reported record stream includes large blocks of records comprising trace records of a single type (in addition, possibly, to trace records which may be deleted or ignored). This method recognizes a stream of compressible records by their type (using PIPESTAT signal, for example) and counts the number of successive records encountered in the stream, and then creates a processed trace record reporting the type of record encountered, and the number of successive records of that type encountered without interruption or intercession of a record of another compressible or non-compressible type (though they may be interrupted by certain types of trace records which themselves are deleted from. Another compression method will result in relatively higher compression ratios when the reported record stream includes many compressible trace records, but those records are of varying type. This method recognizes a stream of compressible records by their type (using PIPESTAT signal, for example). Recognizing that these records contain a meaningful PIPESTAT signal and meaningless or low-value data in the data packets, the method copies the meaningful data (typically, only the PIPESTAT signal is meaningful) of several reported trace records into a single processed trace record. Thus, trace records of several different types may be compressed into the same processed trace record. The compression algorithms may be selected by the operator of the system, depending on the expected quality of the reported trace record, or it may be selected by the system, automatically, depending on the actual trace records encountered.